1. Field of the Invention
The present invention relates to semiconductor devices. In particular, this invention is related to integrated circuits having programmable interconnections.
2. Description of the Related Art
Heretofore, various schemes have been used to implement the interconnections of programmable integrated circuits. Basically, the programmable elements used in these programmable integrated circuits are classified under two categories, namely, the destructively programmable type and the non-destructively programmable type.
Under the category of destructively programmable type, integrated circuits are rendered programmable through the use of fuses or anti-fuses. In the case of devices using fuses, the two terminal points of a basic programmable element are initially connected by a fuse during the fabrication process. Should the electrical connection of the two terminal points are not intended to be connected for a specific application, the fuse will be burnt by the user. In the case of devices using anti-fuses, a reverse scenario applies. Anti-fuses are essentially capacitor type devices. The two terminal points of a basic programmable element are initially fabricated without any electrical connections. The two terminal points are electrically bridged together after programming.
Under the category of non-destructively programmable type, the programmable integrated circuits are fabricated with elements that are re-programmable. An example of such an element is an enhancement type Metal Oxide Semiconductor Field Effect Transistor (MOSFET). When a supply voltage is applied to the gate of a MOSFET, a conductive channel is induced underneath the gate. The drain and source terminals are thereby electrically connected. Current can then be passed through the induced channel with minimal voltage potential drop across the source and drain terminals. When the supply voltage is removed, the channel underneath the gate basically disappears. The drain and source terminals are thus electrically disconnected, resulting in a state of disconnection for the programmable element. Another type of re-programmable logic element is exemplified by a MOSFET with a floating gate, such as a basic Electrical Erasable Programmable Read Only Memory (EEPROM) cell. The threshold voltage of an EEPROM cell may be programmed to assume a positive or negative value. For instance, a N-channel floating gate MOSFET can be programmed with a positive threshold voltage by trapping the floating gate with negative charges through the process of capacitive coupling, thereby inverting the underlying channel into a P-type semiconductor region and electrically disconnecting the source and the drain. The mechanism of trapping a specific charge for the floating gate from the underlying channel via the thin gate oxide is called Fowler-Nordheim (F-N) tunneling which is well known in the EEPROM technology. However, heretofore, integrated circuits with programmable interconnections using the aforementioned EEPROM cells involve very complicated sensing and decoding schemes, which render them expensive to manufacture.